[7.0] [Feature] nvidia kernel CXL Type-2 VFIO support for devel-7.0: CXL/VFIO-CXL enablement stack - part3 · Pull Request !9620 · anolis/cloud-kernel

bugzilla: https://bugzilla.openanolis.cn/show_bug.cgi?id=38445

This is the part 3 of backporting nvidia-kernel cxl infrastructure.
Part1: https://gitee.com/anolis/cloud-kernel/pulls/9617
Part2: https://gitee.com/anolis/cloud-kernel/pulls/9619

- New VFIO UAPI for CXL-capable PCI device assignment.
- CXL state integration into `vfio_pci_core_device`.
- `CONFIG_VFIO_CXL_CORE` and initial VFIO-CXL hook infrastructure.
- VFIO PCI config access helper exports.
- CXL DVSEC detection and HDM block probing.
- HDM decoder register emulation framework.
- HDM range activation wait and memdev creation.
- CXL region management support through VFIO-CXL.
- DPA VFIO region support with demand-fault mmap and reset-time zap.
- CXL DVSEC config write virtualization.
- CXL region registration with the VFIO layer.
- CXL capability and sparse component BAR advertisement to userspace.
- Opt-out support for the CXL feature.
- CXL DPA reset handling wired into the VFIO PCI reset flow.
- HDM decoder base preservation across reset.
- DVSEC STATUS2 virtualization in the vconfig shadow.
- `vfio_cxl_reset()` implementation.

commits:
NVIDIA: VR: SAUCE: vfio: UAPI for CXL-capable PCI device assignment
NVIDIA: VR: SAUCE: vfio/pci: Add CXL state to vfio_pci_core_device
NVIDIA: VR: SAUCE: vfio/pci: Add CONFIG_VFIO_CXL_CORE and stub CXL hooks
NVIDIA: VR: SAUCE: vfio/pci: Export config access helpers
NVIDIA: VR: SAUCE: vfio/cxl: Detect CXL DVSEC and probe HDM block
NVIDIA: VR: SAUCE: vfio/cxl: Introduce HDM decoder register emulation framework
NVIDIA: VR: SAUCE: vfio/cxl: Wait for HDM ranges and create memdev
NVIDIA: VR: SAUCE: vfio/cxl: CXL region management support
NVIDIA: VR: SAUCE: vfio/cxl: DPA VFIO region with demand fault mmap and reset zap
NVIDIA: VR: SAUCE: vfio/cxl: Virtualize CXL DVSEC config writes
NVIDIA: VR: SAUCE: vfio/cxl: Register regions with VFIO layer
NVIDIA: VR: SAUCE: vfio/pci: Advertise CXL cap and sparse component BAR to userspace
NVIDIA: VR: SAUCE: vfio/cxl: Provide opt-out for CXL feature
NVIDIA: VR: SAUCE: vfio/pci: Wire CXL DPA reset handling
NVIDIA: VR: SAUCE: vfio/cxl: Ensure PCI Memory Space is enabled before post-reset BAR access
NVIDIA: VR: SAUCE: vfio/cxl: preserve HDM decoder base addresses across reset
NVIDIA: VR: SAUCE: vfio/cxl: virtualize DVSEC STATUS2 register in vconfig shadow
NVIDIA: VR: SAUCE: vfio/cxl: Implement vfio_cxl_reset()

类型	指派人员	状态
审查	xunlei 半叶枫尘 winterddd xueshuai 冯光辉 Guixin Liu XiangZao	已完成 (0/0人)
测试	小龙	进行中 (0/1人)

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